CROSS REFERENCE TO RELATED PATENT DOCUMENTS The present document is somewhat related to the copending and commonly assigned patent application documents "COMPLEMENTARY HETEROSTRUCTURE INTEGRATED SINGLE METAL TRANSISTOR FABRICATION METHOD", AFD 00283, Ser. No. 09/059,890; "SINGLE LAYER INTEGRATED METAL ENHANCEMENT MODE FIELD-EFFECT TRANSISTOR APPARATUS", AFD 00284, Ser. No 09/059,891; and "SINGLE LAYER INTEGRATED METAL PROCESS FOR ENHANCEMENT MODE FIELD-EFFECT TRANSISTOR", AFD 00285, Ser. No. 09/059,892; which are all filed of even date herewith. The contents of these related even filing date applications are hereby incorporated by reference herein. The present document is also somewhat related to the previously filed and commonly assigned patent application documents "METAL SEMICONDUCTOR FIELD-EFFECT TRANSISTOR (MESFET) DEVICE WITH SINGLE LAYER METAL", AFD 00156, Ser. No. 08/684,754; "SINGLE LAYER INTEGRATED METAL PROCESS FOR METAL SEMICONDUCTOR FIELD-EFFECT TRANSISTOR (MESFET)", AFD 00157, Ser. No. 08/684,760; "HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND PSEUDOMORPHIC HIGH ELECTRON MOBILITY TRANSISTOR (PHEMT) DEVICES WITH SINGLE LAYER INTEGRATED METAL" AFD 00158, Ser. No. 08/684,754, now U.S. Pat. No. 5,698,900 now U.S. Pat. No. 5,698,870; "SINGLE LAYER INTEGRATED METAL PROCESS FOR HIGH ELECTRON MOBILITY TRANSISTOR (HEMT) AND PSEUDOMORPHIC HIGH ELECTRON MOBILITY TRANSISTOR (PHEMT)" AFD 00082, Ser. No. 08/684,761; "FIELD-EFFECT TRANSISTOR PROCESS WITH SEMICONDUCTOR MASK, SINGLE LAYER INTEGRATED METAL, AND DUAL ETCH STOPS" AFD 00169, Ser. No. 08/684,755; and "FIELD-EFFECT TRANSISTOR DEVICE WITH SINGLE LAYER INTEGRATED METAL AND RETAINED SEMICONDUCTOR MASKING" AFD 00170, Ser. No. 08/684,734. The contents of these previously filed related applications are also hereby incorporated by reference herein.